Chia-Chun Tsai, Chung-Chieh Kuo, Lin-Jeng Gu, Trong-Yen Lee. Double-via insertion enhanced X-architecture clock routing for reliability. In International Symposium on Circuits and Systems (ISCAS 2010), May 30 - June 2, 2010, Paris, France. pages 3413-3416, IEEE, 2010. [doi]
Abstract is missing.