An On-Chip Jitter Measurement Circuit for the PLL

Chin-Cheng Tsai, Chung-Len Lee. An On-Chip Jitter Measurement Circuit for the PLL. In 12th Asian Test Symposium (ATS 2003), 17-19 November 2003, Xian, China. pages 332-335, IEEE Computer Society, 2003. [doi]

@inproceedings{TsaiL03:1,
  title = {An On-Chip Jitter Measurement Circuit for the PLL},
  author = {Chin-Cheng Tsai and Chung-Len Lee},
  year = {2003},
  url = {http://csdl.computer.org/comp/proceedings/ats/2003/1951/00/19510332abs.htm},
  researchr = {https://researchr.org/publication/TsaiL03%3A1},
  cites = {0},
  citedby = {0},
  pages = {332-335},
  booktitle = {12th Asian Test Symposium (ATS 2003), 17-19 November 2003, Xian, China},
  publisher = {IEEE Computer Society},
  isbn = {0-7695-1951-2},
}