An On-Chip Jitter Measurement Circuit for the PLL

Chin-Cheng Tsai, Chung-Len Lee. An On-Chip Jitter Measurement Circuit for the PLL. In 12th Asian Test Symposium (ATS 2003), 17-19 November 2003, Xian, China. pages 332-335, IEEE Computer Society, 2003. [doi]

Abstract

Abstract is missing.