An FPGA Hardware Parallel Implementation of the DES Algorithm

I. N. Tselepis, M. P. Bekakos. An FPGA Hardware Parallel Implementation of the DES Algorithm. Neural Parallel & Scientific Comp., 12:455-464, 2004.

@article{TselepisB04,
  title = {An FPGA Hardware Parallel Implementation of the DES Algorithm},
  author = {I. N. Tselepis and M. P. Bekakos},
  year = {2004},
  researchr = {https://researchr.org/publication/TselepisB04},
  cites = {0},
  citedby = {0},
  journal = {Neural Parallel & Scientific Comp.},
  volume = {12},
  pages = {455-464},
}