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Chien-Jian Tseng, Hung-Wei Chen, Wei-Ting Shen, Wei-Chih Cheng, Hsin-Shu Chen. A 10-b 320-MS/s Stage-Gain-Error Self-Calibration Pipeline ADC. J. Solid-State Circuits, 47(6):1334-1343, 2012. [doi]
Abstract is missing.