A 12-Bit 1.25-GS/s DAC in 90 nm CMOS With >70 dB SFDR up to 500 MHz

Wei-Hsin Tseng, Chi-Wei Fan, Jieh-Tsorng Wu. A 12-Bit 1.25-GS/s DAC in 90 nm CMOS With >70 dB SFDR up to 500 MHz. J. Solid-State Circuits, 46(12):2845-2856, 2011. [doi]

Authors

Wei-Hsin Tseng

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Chi-Wei Fan

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Jieh-Tsorng Wu

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