Wei-Hsin Tseng, Chi-Wei Fan, Jieh-Tsorng Wu. A 12-Bit 1.25-GS/s DAC in 90 nm CMOS With >70 dB SFDR up to 500 MHz. J. Solid-State Circuits, 46(12):2845-2856, 2011. [doi]
@article{TsengFW11-0,
title = {A 12-Bit 1.25-GS/s DAC in 90 nm CMOS With >70 dB SFDR up to 500 MHz},
author = {Wei-Hsin Tseng and Chi-Wei Fan and Jieh-Tsorng Wu},
year = {2011},
doi = {10.1109/JSSC.2011.2164302},
url = {http://dx.doi.org/10.1109/JSSC.2011.2164302},
researchr = {https://researchr.org/publication/TsengFW11-0},
cites = {0},
citedby = {0},
journal = {J. Solid-State Circuits},
volume = {46},
number = {12},
pages = {2845-2856},
}