A low-power rail-to-rail 6-bit flash ADC based on a novel complementary average-value approach

Hui-Chin Tseng, Hsin-Hung Ou, Chi-Sheng Lin, Bin-Da Liu. A low-power rail-to-rail 6-bit flash ADC based on a novel complementary average-value approach. In Rajiv V. Joshi, Kiyoung Choi, Vivek Tiwari, Kaushik Roy, editors, Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004, Newport Beach, California, USA, August 9-11, 2004. pages 252-256, ACM, 2004. [doi]

Abstract

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