Akira Tsuchiya, Masanori Hashimoto, Hidetoshi Onodera. Design guideline for resistive termination of on-chip high-speed interconnects. In Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, CICC 2005, DoubleTree Hotel, San Jose, California, USA, September 18-21, 2005. pages 613-616, IEEE, 2005. [doi]
Abstract is missing.