Bogdan Tutuianu, Daksh Lehther, Madhulima Pandey, Ross Baldick. Efficient RLC Macromodels for Digital IC Interconnect. In L. Miguel Silveira, Srinivas Devadas, Ricardo Augusto da Luz Reis, editors, VLSI: Systems on a Chip, IFIP TC10/WG10.5 Tenth International Conference on Very Large Scale Integration (VLSI 99), December 1-4, 1999, Lisbon, Portugal. Volume 162 of IFIP Conference Proceedings, pages 293-304, Kluwer, 1999.
@inproceedings{TutuianuLPB99,
title = {Efficient RLC Macromodels for Digital IC Interconnect},
author = {Bogdan Tutuianu and Daksh Lehther and Madhulima Pandey and Ross Baldick},
year = {1999},
researchr = {https://researchr.org/publication/TutuianuLPB99},
cites = {0},
citedby = {0},
pages = {293-304},
booktitle = {VLSI: Systems on a Chip, IFIP TC10/WG10.5 Tenth International Conference on Very Large Scale Integration (VLSI 99), December 1-4, 1999, Lisbon, Portugal},
editor = {L. Miguel Silveira and Srinivas Devadas and Ricardo Augusto da Luz Reis},
volume = {162},
series = {IFIP Conference Proceedings},
publisher = {Kluwer},
isbn = {0-7923-7731-1},
}