A Low-Latency Algorithm and FPGA Design for the Min-Search of LDPC Decoders

Georgios Tzimpragos, Christoforos Kachris, Dimitrios Soudris, Ioannis Tomkos. A Low-Latency Algorithm and FPGA Design for the Min-Search of LDPC Decoders. In 2014 IEEE International Parallel & Distributed Processing Symposium Workshops, Phoenix, AZ, USA, May 19-23, 2014. pages 269-274, IEEE, 2014. [doi]

Abstract

Abstract is missing.