Multi-bit Sigma-Delta TDC Architecture with Improved Linearity

Satoshi Uemori, Masamichi Ishii, Haruo Kobayashi, Daiki Hirabayashi, Yuta Arakawa, Yuta Doi, Osamu Kobayashi, Tatsuji Matsuura, Kiichi Niitsu, Yuji Yano, Tatsuhiro Gake, Takahiro J. Yamaguchi, Nobukazu Takai. Multi-bit Sigma-Delta TDC Architecture with Improved Linearity. J. Electronic Testing, 29(6):879-892, 2013. [doi]

@article{UemoriIKHADKMNYGYT13,
  title = {Multi-bit Sigma-Delta TDC Architecture with Improved Linearity},
  author = {Satoshi Uemori and Masamichi Ishii and Haruo Kobayashi and Daiki Hirabayashi and Yuta Arakawa and Yuta Doi and Osamu Kobayashi and Tatsuji Matsuura and Kiichi Niitsu and Yuji Yano and Tatsuhiro Gake and Takahiro J. Yamaguchi and Nobukazu Takai},
  year = {2013},
  doi = {10.1007/s10836-013-5408-6},
  url = {http://dx.doi.org/10.1007/s10836-013-5408-6},
  researchr = {https://researchr.org/publication/UemoriIKHADKMNYGYT13},
  cites = {0},
  citedby = {0},
  journal = {J. Electronic Testing},
  volume = {29},
  number = {6},
  pages = {879-892},
}