Rei Ueno, Naofumi Homma, Sumio Morioka, Noriyuki Miura, Kohei Matsuda, Makoto Nagata, Shivam Bhasin, Yves Mathieu, Tarik Graba, Jean-Luc Danger. High Throughput/Gate AES Hardware Architectures Based on Datapath Compression. IEEE Transactions on Computers, 69(4):534-548, 2020. [doi]
@article{UenoHMMMNBMGD20,
title = {High Throughput/Gate AES Hardware Architectures Based on Datapath Compression},
author = {Rei Ueno and Naofumi Homma and Sumio Morioka and Noriyuki Miura and Kohei Matsuda and Makoto Nagata and Shivam Bhasin and Yves Mathieu and Tarik Graba and Jean-Luc Danger},
year = {2020},
doi = {10.1109/TC.2019.2957355},
url = {https://doi.org/10.1109/TC.2019.2957355},
researchr = {https://researchr.org/publication/UenoHMMMNBMGD20},
cites = {0},
citedby = {0},
journal = {IEEE Transactions on Computers},
volume = {69},
number = {4},
pages = {534-548},
}