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A High Throughput/Gate AES Hardware Architecture by Compressing Encryption and Decryption Datapaths - Toward Efficient CBC-Mode Implementation

Rei Ueno, Sumio Morioka, Naofumi Homma, Takafumi Aoki. A High Throughput/Gate AES Hardware Architecture by Compressing Encryption and Decryption Datapaths - Toward Efficient CBC-Mode Implementation. IACR Cryptology ePrint Archive, 2016:595, 2016. [doi]

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