QUEST: A 7.49TOPS multi-purpose log-quantized DNN inference engine stacked on 96MB 3D SRAM using inductive-coupling technology in 40nm CMOS - researchr publication authors

researchr

You are not signed in
Sign in
Sign up

Kodai Ueyoshi, Kota Ando, Kazutoshi Hirose, Shinya Takamaeda-Yamazaki, Junichiro Kadomoto, Tomoki Miyata, Mototsugu Hamada, Tadahiro Kuroda, Masato Motomura. QUEST: A 7.49TOPS multi-purpose log-quantized DNN inference engine stacked on 96MB 3D SRAM using inductive-coupling technology in 40nm CMOS. In 2018 IEEE International Solid-State Circuits Conference, ISSCC 2018, San Francisco, CA, USA, February 11-15, 2018. pages 216-218, IEEE, 2018. [doi]

This author has not been identified. Look up 'Kodai Ueyoshi' in GoogleThis author has not been identified. Look up 'Kota Ando' in GoogleThis author has not been identified. Look up 'Kazutoshi Hirose' in GoogleThis author has not been identified. Look up 'Shinya Takamaeda-Yamazaki' in GoogleThis author has not been identified. Look up 'Junichiro Kadomoto' in GoogleThis author has not been identified. Look up 'Tomoki Miyata' in GoogleThis author has not been identified. Look up 'Mototsugu Hamada' in GoogleThis author has not been identified. Look up 'Tadahiro Kuroda' in GoogleThis author has not been identified. Look up 'Masato Motomura' in Google

runs on WebDSL