Test Pattern Generation for Path Delay Faults in Synchronous Sequential Circuits Using Multiple Fast Clocks and Multiple Observations Times

Prasanti Uppaluri, Irith Pomeranz, Sudhakar M. Reddy. Test Pattern Generation for Path Delay Faults in Synchronous Sequential Circuits Using Multiple Fast Clocks and Multiple Observations Times. In FTCS. pages 456-465, 1994.

Abstract

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