Nonvolatile SRAM Using Fishbone-in-Cage Capacitor in a 180 nm Standard CMOS Process for Zero-Standby and Instant-Powerup Embedded Memory on IoT

Takaki Urabe, Hiroyuki Ochi, Kazutoshi Kobayashi. Nonvolatile SRAM Using Fishbone-in-Cage Capacitor in a 180 nm Standard CMOS Process for Zero-Standby and Instant-Powerup Embedded Memory on IoT. In IEEE Symposium in Low-Power and High-Speed Chips, COOL CHIPS 2021, Tokyo, Japan, April 14-16, 2021. pages 1-3, IEEE, 2021. [doi]

Abstract

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