A 100-MHz 2-D discrete cosine transform core processor

Shin-ichi Uramoto, Yoshitsugu Inoue, Akihiko Takabatake, Jun Takeda, Yukihiro Yamashita, Hideyuki Terane, Masahiko Yoshimoto. A 100-MHz 2-D discrete cosine transform core processor. J. Solid-State Circuits, 27(4):492-499, April 1992. [doi]

Abstract

Abstract is missing.