A Reconfigurable INC/DEC/2's Complement/Priority Encoder Circuit with Improved Decision Block

Chetan Kumar V., Sai Phaneendra P., Syed Ershad Ahmed, Sreehari Veeramachaneni, N. Moorthy Muthukrishnan, M. B. Srinivas. A Reconfigurable INC/DEC/2's Complement/Priority Encoder Circuit with Improved Decision Block. In International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011. pages 100-105, IEEE, 2011. [doi]

@inproceedings{VPAVMS11-1,
  title = {A Reconfigurable INC/DEC/2's Complement/Priority Encoder Circuit with Improved Decision Block},
  author = {Chetan Kumar V. and Sai Phaneendra P. and Syed Ershad Ahmed and Sreehari Veeramachaneni and N. Moorthy Muthukrishnan and M. B. Srinivas},
  year = {2011},
  doi = {10.1109/ISED.2011.52},
  url = {http://doi.ieeecomputersociety.org/10.1109/ISED.2011.52},
  researchr = {https://researchr.org/publication/VPAVMS11-1},
  cites = {0},
  citedby = {0},
  pages = {100-105},
  booktitle = {International Symposium on Electronic System Design, ISED 2011, Kochi, Kerala, India, December 19-21, 2011},
  publisher = {IEEE},
  isbn = {978-1-4577-1880-9},
}