Ramesh Vaddi, Sudeb Dasgupta, R. P. Agarwal. Effect of Gate-S/D Underlap, Asymmetric and Independent Gate Features in the Minimization of Short Channel Effects in Nanoscale DGMOSFET. In IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2011, 4-6 July 2011, Chennai, India. pages 37-42, IEEE Computer Society, 2011. [doi]
Abstract is missing.