Discrete-time, cyclostationary phase-locked loop model for jitter analysis - researchr publication authors

researchr

You are not signed in
Sign in
Sign up

Sokratis D. Vamvakos, Vladimir Stojanovic, Borivoje Nikolic. Discrete-time, cyclostationary phase-locked loop model for jitter analysis. In IEEE Custom Integrated Circuits Conference, CICC 2009, San Jose, California, USA, 13-16 September, 2009, Proceedings. pages 637-640, IEEE, 2009. [doi]

This author has not been identified. Look up 'Sokratis D. Vamvakos' in GoogleThis author has not been identified. Look up 'Vladimir Stojanovic' in GoogleThis author has not been identified. Look up 'Borivoje Nikolic' in Google

runs on WebDSL