Discrete-time, cyclostationary phase-locked loop model for jitter analysis

Sokratis D. Vamvakos, Vladimir Stojanovic, Borivoje Nikolic. Discrete-time, cyclostationary phase-locked loop model for jitter analysis. In IEEE Custom Integrated Circuits Conference, CICC 2009, San Jose, California, USA, 13-16 September, 2009, Proceedings. pages 637-640, IEEE, 2009. [doi]

@inproceedings{VamvakosSN09,
  title = {Discrete-time, cyclostationary phase-locked loop model for jitter analysis},
  author = {Sokratis D. Vamvakos and Vladimir Stojanovic and Borivoje Nikolic},
  year = {2009},
  doi = {10.1109/CICC.2009.5280745},
  url = {http://dx.doi.org/10.1109/CICC.2009.5280745},
  researchr = {https://researchr.org/publication/VamvakosSN09},
  cites = {0},
  citedby = {0},
  pages = {637-640},
  booktitle = {IEEE Custom Integrated Circuits Conference, CICC 2009, San Jose, California, USA, 13-16 September, 2009, Proceedings},
  publisher = {IEEE},
  isbn = {978-1-4244-4071-9},
}