Identifying translinear loops in the circuit topology

Rafael Vargas-Bernal, Arturo Sarmiento-Reyes, Wouter A. Serdijn. Identifying translinear loops in the circuit topology. In IEEE International Symposium on Circuits and Systems, ISCAS 2000, Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31 May 2000, Proceedings. pages 585-588, IEEE, 2000. [doi]

Abstract

Abstract is missing.