Low-cost and efficient digital-compatible BIST for analog circuits using pulse response sampling

Pramodchandran N. Variyam, Abhijit Chatterjee, Naveena Nagi. Low-cost and efficient digital-compatible BIST for analog circuits using pulse response sampling. In 15th IEEE VLSI Test Symposium (VTS 97), April 27-May 1, 1997, Monterey, California, USA. pages 261-266, IEEE Computer Society, 1997. [doi]

@inproceedings{VariyamCN97,
  title = {Low-cost and efficient digital-compatible BIST for analog circuits using pulse response sampling},
  author = {Pramodchandran N. Variyam and Abhijit Chatterjee and Naveena Nagi},
  year = {1997},
  url = {http://csdl.computer.org/comp/proceedings/vts/1997/7810/00/78100261abs.htm},
  researchr = {https://researchr.org/publication/VariyamCN97},
  cites = {0},
  citedby = {0},
  pages = {261-266},
  booktitle = {15th IEEE VLSI Test Symposium (VTS 97), April 27-May 1, 1997, Monterey, California, USA},
  publisher = {IEEE Computer Society},
}