Aida Varzaghani, Chih-Kong Ken Yang. A 4.8 GS/s 5-bit ADC-Based Receiver With Embedded DFE for Signal Equalization. J. Solid-State Circuits, 44(3):901-915, 2009. [doi]
@article{VarzaghaniY09,
title = {A 4.8 GS/s 5-bit ADC-Based Receiver With Embedded DFE for Signal Equalization},
author = {Aida Varzaghani and Chih-Kong Ken Yang},
year = {2009},
doi = {10.1109/JSSC.2009.2013765},
url = {https://doi.org/10.1109/JSSC.2009.2013765},
researchr = {https://researchr.org/publication/VarzaghaniY09},
cites = {0},
citedby = {0},
journal = {J. Solid-State Circuits},
volume = {44},
number = {3},
pages = {901-915},
}