A 4.8 GS/s 5-bit ADC-Based Receiver With Embedded DFE for Signal Equalization

Aida Varzaghani, Chih-Kong Ken Yang. A 4.8 GS/s 5-bit ADC-Based Receiver With Embedded DFE for Signal Equalization. J. Solid-State Circuits, 44(3):901-915, 2009. [doi]

Abstract

Abstract is missing.