A 0.7 μm CMOS clock recovery circuit for 622 Mb/s SDH systems

Eduardo de Vasconcelos, Rui L. Aguiar, Dinis M. Santos. A 0.7 μm CMOS clock recovery circuit for 622 Mb/s SDH systems. In 5th IEEE International Conference on Electronics, Circuits and Systems, ICECS 1998, Surfing the Waves of Science and Technology, Lisbon, Portugal, September 7-10, 1998 . pages 411-414, IEEE, 1998. [doi]

Authors

Eduardo de Vasconcelos

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Rui L. Aguiar

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Dinis M. Santos

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