Zdenek Vasícek, Lukás Sekanina. Formal verification of candidate solutions for post-synthesis evolutionary optimization in evolvable hardware. Genetic Programming and Evolvable Machines, 12(3):305-327, 2011. [doi]
@article{VasicekS11,
title = {Formal verification of candidate solutions for post-synthesis evolutionary optimization in evolvable hardware},
author = {Zdenek Vasícek and Lukás Sekanina},
year = {2011},
doi = {10.1007/s10710-011-9132-7},
url = {http://dx.doi.org/10.1007/s10710-011-9132-7},
tags = {optimization},
researchr = {https://researchr.org/publication/VasicekS11},
cites = {0},
citedby = {0},
journal = {Genetic Programming and Evolvable Machines},
volume = {12},
number = {3},
pages = {305-327},
}