A Parallel Algorithm for Bayesian Network Inference Using Arithmetic Circuits

Md. Vasimuddin, Sriram P. Chockalingam, Srinivas Aluru. A Parallel Algorithm for Bayesian Network Inference Using Arithmetic Circuits. In 2018 IEEE International Parallel and Distributed Processing Symposium, IPDPS 2018, Vancouver, BC, Canada, May 21-25, 2018. pages 34-43, IEEE Computer Society, 2018. [doi]

Abstract

Abstract is missing.