Vesselin K. Vassilev, Vladislav A. Vashchenko, Philippe Jansen, B. J. Choi, A. Concannon, J. J. Yang, Guido Groeseneken, M. I. Natarajan, M. ter Beek, P. Hopper, Michiel Steyaert, H. E. Maes. A CAD assisted design and optimisation methodology for over-voltage ESD protection circuits. Microelectronics Reliability, 44(9-11):1885-1890, 2004. [doi]
@article{VassilevVJCCYGNBHSM04,
title = {A CAD assisted design and optimisation methodology for over-voltage ESD protection circuits},
author = {Vesselin K. Vassilev and Vladislav A. Vashchenko and Philippe Jansen and B. J. Choi and A. Concannon and J. J. Yang and Guido Groeseneken and M. I. Natarajan and M. ter Beek and P. Hopper and Michiel Steyaert and H. E. Maes},
year = {2004},
doi = {10.1016/j.microrel.2004.07.102},
url = {http://dx.doi.org/10.1016/j.microrel.2004.07.102},
researchr = {https://researchr.org/publication/VassilevVJCCYGNBHSM04},
cites = {0},
citedby = {0},
journal = {Microelectronics Reliability},
volume = {44},
number = {9-11},
pages = {1885-1890},
}