Up to 13.7% Increase in Throughput of RISC V SoC Using Timing Speculative Razor SRAM - researchr publication

researchr

You are not signed in
Sign in
Sign up

Srikrishna Vasudev, Kartickraj K, Anuj Grover. Up to 13.7% Increase in Throughput of RISC V SoC Using Timing Speculative Razor SRAM. In IEEE Asia Pacific Conference on Circuit and Systems, APCCAS 2022, Shenzhen, China, November 11-13, 2022. pages 222-225, IEEE, 2022. [doi]

Abstract is missing.

runs on WebDSL