D. P. Vasudevan, Parag K. Lala, James Patrick Parkerson. Online Testable Reversible Logic Circuit Design using NAND Blocks. In 19th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2004), 10-13 October 2004, Cannes, France, Proceedings. pages 324-331, IEEE Computer Society, 2004. [doi]
Abstract is missing.