M. Vazquez, Gustavo Sutter, Gery Bioul, Jean-Pierre Deschamps. Decimal Adders/Subtractors in FPGA: Efficient 6-input LUT Implementations. In Viktor K. Prasanna, Lionel Torres, René Cumplido, editors, ReConFig 09: 2009 International Conference on Reconfigurable Computing and FPGAs, Cancun, Quintana Roo, Mexico, 9-11 December 2009, Proceedings. pages 42-47, IEEE Computer Society, 2009. [doi]
@inproceedings{VazquezSBD09,
title = {Decimal Adders/Subtractors in FPGA: Efficient 6-input LUT Implementations},
author = {M. Vazquez and Gustavo Sutter and Gery Bioul and Jean-Pierre Deschamps},
year = {2009},
doi = {10.1109/ReConFig.2009.29},
url = {http://doi.ieeecomputersociety.org/10.1109/ReConFig.2009.29},
researchr = {https://researchr.org/publication/VazquezSBD09},
cites = {0},
citedby = {0},
pages = {42-47},
booktitle = {ReConFig 09: 2009 International Conference on Reconfigurable Computing and FPGAs, Cancun, Quintana Roo, Mexico, 9-11 December 2009, Proceedings},
editor = {Viktor K. Prasanna and Lionel Torres and René Cumplido},
publisher = {IEEE Computer Society},
isbn = {978-0-7695-3917-1},
}