Finding best voltage and frequency to shorten power-constrained test time - researchr publication authors

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Praveen Venkataramani, Suraj Sindia, Vishwani D. Agrawal. Finding best voltage and frequency to shorten power-constrained test time. In 31st IEEE VLSI Test Symposium, VTS 2013, Berkeley, CA, USA, April 29 - May 2, 2013. pages 1-6, IEEE Computer Society, 2013. [doi]

This author has not been identified. Look up 'Praveen Venkataramani' in GoogleThis author has not been identified. Look up 'Suraj Sindia' in GoogleThis author has not been identified. Look up 'Vishwani D. Agrawal' in Google

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