Praveen Venkataramani, Suraj Sindia, Vishwani D. Agrawal. Finding best voltage and frequency to shorten power-constrained test time. In 31st IEEE VLSI Test Symposium, VTS 2013, Berkeley, CA, USA, April 29 - May 2, 2013. pages 1-6, IEEE Computer Society, 2013. [doi]
@inproceedings{VenkataramaniSA13,
title = {Finding best voltage and frequency to shorten power-constrained test time},
author = {Praveen Venkataramani and Suraj Sindia and Vishwani D. Agrawal},
year = {2013},
doi = {10.1109/VTS.2013.6548882},
url = {http://doi.ieeecomputersociety.org/10.1109/VTS.2013.6548882},
researchr = {https://researchr.org/publication/VenkataramaniSA13},
cites = {0},
citedby = {0},
pages = {1-6},
booktitle = {31st IEEE VLSI Test Symposium, VTS 2013, Berkeley, CA, USA, April 29 - May 2, 2013},
publisher = {IEEE Computer Society},
isbn = {978-1-4673-5542-1},
}