Raja Venkatesh, Sailesh Kumar, Joji Philip, Sunil Shukla. A Fault Modeling Technique to Test Memory BIST Algorithms. In 10th IEEE International Workshop on Memory Technology, Design, and Testing (MTDT 2002), 10-12 July 2002, Isle of Bendor, France. pages 109-116, IEEE Computer Society, 2002. [doi]
Abstract is missing.