The following publications are possibly variants of this publication:
- Modified Booth Modulo 2:::n:::-1 MultipliersCostas Efstathiou, Haridimos T. Vergos, Dimitris Nikolos. TC, 53(3):370-374, 2004. [doi]
- Design of efficient modulo 2:::n:::+1 multipliersHaridimos T. Vergos, Costas Efstathiou. iet-cdt, 1(1):49-57, 2007. [doi]
- On the Design of Modulo 2^n+1 MultipliersConstantinos Efstathiou, Kiamal Z. Pekmestzi, Nicholas Axelos. dsd 2011: 453-459 [doi]
- Efficient Diminished-1 Modulo 2^n+1 MultipliersCostas Efstathiou, Haridimos T. Vergos, Giorgos Dimitrakopoulos, Dimitris Nikolos. TC, 54(4):491-496, 2005. [doi]
- Diminished-1 Modulo 2:::n::: + 1 Squarer DesignHaridimos T. Vergos, Costas Efstathiou. dsdm 2004: 380-386 [doi]
- Efficient modulo 2:::n:::+1 adder architecturesHaridimos T. Vergos, Costas Efstathiou. integration, 42(2):149-157, 2009. [doi]