Efficient modulo 2:::n:::+1 adder architectures

Haridimos T. Vergos, Costas Efstathiou. Efficient modulo 2:::n:::+1 adder architectures. Integration, 42(2):149-157, 2009. [doi]

@article{VergosE09,
  title = {Efficient modulo 2:::n:::+1 adder architectures},
  author = {Haridimos T. Vergos and Costas Efstathiou},
  year = {2009},
  doi = {10.1016/j.vlsi.2008.04.004},
  url = {http://dx.doi.org/10.1016/j.vlsi.2008.04.004},
  tags = {architecture},
  researchr = {https://researchr.org/publication/VergosE09},
  cites = {0},
  citedby = {0},
  journal = {Integration},
  volume = {42},
  number = {2},
  pages = {149-157},
}