Glitch Power Reduction via Clock Skew Scheduling

Arunkumar Vijayakumar, Sandip Kundu. Glitch Power Reduction via Clock Skew Scheduling. In IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2014, Tampa, FL, USA, July 9-11, 2014. pages 504-509, IEEE, 2014. [doi]

Abstract

Abstract is missing.