On Maximizing Decoupling Capacitance of Clock-Gated Logic for Robust Power Delivery

Arunkumar Vijayakumar, Vinay C. Patil, Sandip Kundu. On Maximizing Decoupling Capacitance of Clock-Gated Logic for Robust Power Delivery. In IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2014, Tampa, FL, USA, July 9-11, 2014. pages 510-515, IEEE, 2014. [doi]

Authors

Arunkumar Vijayakumar

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Vinay C. Patil

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Sandip Kundu

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