Power optimal Network-on-Chip interconnect design

G. Vikas, Joy Kuri, Kuruvilla Varghese. Power optimal Network-on-Chip interconnect design. In Annual IEEE International SoC Conference, SoCC 2009, September 9-11, 2009, Belfast, Northern Ireland, UK, Proceedings. pages 147-150, IEEE, 2009. [doi]

@inproceedings{VikasKV09,
  title = {Power optimal Network-on-Chip interconnect design},
  author = {G. Vikas and Joy Kuri and Kuruvilla Varghese},
  year = {2009},
  doi = {10.1109/SOCCON.2009.5398071},
  url = {http://dx.doi.org/10.1109/SOCCON.2009.5398071},
  researchr = {https://researchr.org/publication/VikasKV09},
  cites = {0},
  citedby = {0},
  pages = {147-150},
  booktitle = {Annual IEEE International SoC Conference, SoCC 2009, September 9-11, 2009, Belfast, Northern Ireland, UK, Proceedings},
  publisher = {IEEE},
  isbn = {978-1-4244-4940-8},
}