A 65nm 1Gb 2b/Cell NOR Flash with 2.25MB/s Program Throughput and 400MB/s DDR interface

Corrado Villa, Daniele Vimercati, Stefan Schippers, Salvatore Polizzi, Andrea Scavuzzo, Maurizio Perroni, Maurizio Gaibotti, Mauro Luigi Sali. A 65nm 1Gb 2b/Cell NOR Flash with 2.25MB/s Program Throughput and 400MB/s DDR interface. In 2007 IEEE International Solid-State Circuits Conference, ISSCC 2007, Digest of Technical Papers, San Francisco, CA, USA, February 11-15, 2007. pages 476-616, IEEE, 2007. [doi]

Authors

Corrado Villa

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Daniele Vimercati

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Stefan Schippers

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Salvatore Polizzi

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Andrea Scavuzzo

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Maurizio Perroni

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Maurizio Gaibotti

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Mauro Luigi Sali

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