Caffe Barista: Brewing Caffe with FPGAs in the Training Loop

Diederik Adriaan Vink, Aditya Rajagopal, Stylianos I. Venieris, Christos-Savvas Bouganis. Caffe Barista: Brewing Caffe with FPGAs in the Training Loop. In Nele Mentens, Leonel Sousa, Pedro Trancoso, Miquel Pericàs, Ioannis Sourdis, editors, 30th International Conference on Field-Programmable Logic and Applications, FPL 2020, Gothenburg, Sweden, August 31 - September 4, 2020. pages 317-322, IEEE, 2020. [doi]

@inproceedings{VinkRVB20,
  title = {Caffe Barista: Brewing Caffe with FPGAs in the Training Loop},
  author = {Diederik Adriaan Vink and Aditya Rajagopal and Stylianos I. Venieris and Christos-Savvas Bouganis},
  year = {2020},
  doi = {10.1109/FPL50879.2020.00059},
  url = {https://doi.org/10.1109/FPL50879.2020.00059},
  researchr = {https://researchr.org/publication/VinkRVB20},
  cites = {0},
  citedby = {0},
  pages = {317-322},
  booktitle = {30th International Conference on Field-Programmable Logic and Applications, FPL 2020, Gothenburg, Sweden, August 31 - September 4, 2020},
  editor = {Nele Mentens and Leonel Sousa and Pedro Trancoso and Miquel Pericàs and Ioannis Sourdis},
  publisher = {IEEE},
  isbn = {978-1-7281-9902-3},
}