Circuit implementation of on-chip trainable spiking neural network using CMOS based memristive STDP synapses and LIF neurons

Sahibia Kaur Vohra, Sherin A. Thomas, Mahendra Sakare, Devarshi Mrinal Das. Circuit implementation of on-chip trainable spiking neural network using CMOS based memristive STDP synapses and LIF neurons. Integration, 95:102122, March 2024. [doi]

@article{VohraTSD24,
  title = {Circuit implementation of on-chip trainable spiking neural network using CMOS based memristive STDP synapses and LIF neurons},
  author = {Sahibia Kaur Vohra and Sherin A. Thomas and Mahendra Sakare and Devarshi Mrinal Das},
  year = {2024},
  month = {March},
  doi = {10.1016/j.vlsi.2023.102122},
  url = {https://doi.org/10.1016/j.vlsi.2023.102122},
  researchr = {https://researchr.org/publication/VohraTSD24},
  cites = {0},
  citedby = {0},
  journal = {Integration},
  volume = {95},
  pages = {102122},
}