Power Consumption in Reversible Logic Addressed by a Ramp Voltage

Alexis De Vos, Yvan Van Rentergem. Power Consumption in Reversible Logic Addressed by a Ramp Voltage. In Vassilis Paliouras, Johan Vounckx, Diederik Verkest, editors, Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation, 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005, Proceedings. Volume 3728 of Lecture Notes in Computer Science, pages 207-216, Springer, 2005. [doi]

Abstract

Abstract is missing.