The following publications are possibly variants of this publication:
- 13.5 A 64Gb/s/pin PAM4 Single-Ended Transmitter with a Merged Pre-Emphasis Capacitive-Peaking Crosstalk-Cancellation Scheme for Memory Interfaces in 28nm CMOSWeitao Wu, Hongzhi Wu, Liping Zhong, Xuxu Cheng, Xiongshi Luo, Dongfan Xu, Catherine Wang, Zhenghao Li, Quan Pan 0002. isscc 2024: 240-242 [doi]
- A 0.83-pJ/b 20-Gb/s/Pin Single-Ended Transceiver With AC/DC-Coupled Pre-Emphasis FFE and Edge-Dependent Phase-Modulation DFE for Low-Power Memory ControllersXiaofei Wang, Jing Jin 0005, Xiaoming Liu 0008, Hui Wang, Huzhi Tang, Chao Yang, Yuekang Guo, Tingting Mo, Jianjun Zhou. tcasI, 71(2):560-572, February 2024. [doi]
- A 1.4-Vppd 64-Gb/s PAM-4 Transmitter with 4-Tap Hybrid FFE Employing Fractionally-Spaced Pre-Emphasis and Baud-Spaced De-Emphasis in 28-nm CMOSChen Cai, Xuqiang Zheng, Yong Chen, DanYu Wu, Jian Luan 0002, Lei Zhou, Jin Wu, Xinyu Liu. esscirc 2021: 527-530 [doi]