Y. Wang, H. Ahn, Uddalak Bhattacharya, T. Coan, Fatih Hamzaoglu, W. Hafez, C.-H. Jan, R. Kolar, S. Kulkarni, J. Lin, Y. Ng, I. Post, L. Wel, Y. Zhang, K. Zhang, Mark Bohr. A 1.1GHz 12μA/Mb-Leakage SRAM Design in 65nm Ultra-Low-Power CMOS with Integrated Leakage Reduction for Mobile Applications. In 2007 IEEE International Solid-State Circuits Conference, ISSCC 2007, Digest of Technical Papers, San Francisco, CA, USA, February 11-15, 2007. pages 324-606, IEEE, 2007. [doi]
@inproceedings{WangABCHHJKKLNPWZZB07,
title = {A 1.1GHz 12μA/Mb-Leakage SRAM Design in 65nm Ultra-Low-Power CMOS with Integrated Leakage Reduction for Mobile Applications},
author = {Y. Wang and H. Ahn and Uddalak Bhattacharya and T. Coan and Fatih Hamzaoglu and W. Hafez and C.-H. Jan and R. Kolar and S. Kulkarni and J. Lin and Y. Ng and I. Post and L. Wel and Y. Zhang and K. Zhang and Mark Bohr},
year = {2007},
doi = {10.1109/ISSCC.2007.373425},
url = {http://dx.doi.org/10.1109/ISSCC.2007.373425},
researchr = {https://researchr.org/publication/WangABCHHJKKLNPWZZB07},
cites = {0},
citedby = {0},
pages = {324-606},
booktitle = {2007 IEEE International Solid-State Circuits Conference, ISSCC 2007, Digest of Technical Papers, San Francisco, CA, USA, February 11-15, 2007},
publisher = {IEEE},
isbn = {1-4244-0853-9},
}