Automatic Generation of Assertions for Formal Verification of PowerPC Microprocessor Arrays Using Symbolic Trajectory Evaluation

Li-C. Wang, Magdy S. Abadir, Nari Krishnamurthy. Automatic Generation of Assertions for Formal Verification of PowerPC Microprocessor Arrays Using Symbolic Trajectory Evaluation. In DAC. pages 534-537, 1998. [doi]

Abstract

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