Li-C. Wang, Magdy S. Abadir, Jing Zeng. On Logic and Transistor Level Design Error Detection of Various Validation Approaches for PowerPC(tm) Microprocessor Arrays. In 16th IEEE VLSI Test Symposium (VTS 98), 28 April - 1 May 1998, Princeton, NJ, USA. pages 260-265, IEEE Computer Society, 1998. [doi]
Abstract is missing.