Low-Power VLSI Design of LDPC Decoder Using DVFS for AWGN Channels - researchr publication

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Weihuang Wang, Gwan S. Choi, Kiran K. Gunnam. Low-Power VLSI Design of LDPC Decoder Using DVFS for AWGN Channels. In VLSI Design 2009: Improving Productivity through Higher Abstraction, The 22nd International Conference on VLSI Design, New Delhi, India, 5-9 January 2009. pages 51-56, IEEE, 2009. [doi]

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